Si8460/61/62/63
Table 5. Electrical Characteristics 1 (Continued)
(V DD1 = 2.70 V, V DD2 = 2.70 V, T A = –40 to 125 °C; applies to narrow-body SOIC package)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
100 Mbps Supply Current (All inputs = 50 MHz square wave, CI = 15 pF on all outputs)
Si8460Bx
V DD1
V DD2
4.8
15.8
7.2
19.8
mA
Si8461Bx
V DD1
V DD2
6.7
14.2
8.4
17.8
mA
Si8462Bx
V DD1
V DD2
8.7
12.2
10.9
15.3
mA
Si8463Bx
V DD1
V DD2
10.5
10.5
13.1
13.1
mA
Timing Characteristics
Si846xAx
Maximum Data Rate
Minimum Pulse Width
0
1.0
250
Mbps
ns
Propagation Delay
Pulse Width Distortion
t PHL ,t PLH
PWD
See Figure 1
See Figure 1
35
25
ns
ns
|t PLH - t PHL |
Propagation Delay Skew 3
Channel-Channel Skew
t PSK(P-P)
t PSK
40
35
ns
ns
Si846xBx
Maximum Data Rate
Minimum Pulse Width
0
150
6.0
Mbps
ns
Propagation Delay
Pulse Width Distortion
t PHL , t PLH
PWD
See Figure 1
See Figure 1
3.0
6.0
1.5
9.5
2.5
ns
ns
|t PLH - t PHL |
Propagation Delay Skew 3
Channel-Channel Skew
t PSK(P-P)
t PSK
2.0
0.5
3.0
1.8
ns
ns
Notes:
1. Specifications in this table are also valid at VDD1 = 2.6 V and VDD2 = 2.6 V when the operating temperature range is
constrained to T A = 0 to 85 °C.
2. The nominal output impedance of an isolator driver channel is approximately 85 ? , ±40%, which is a combination of the
value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
3. t PSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at the
same supply voltages, load, and ambient temperature.
4. Start-up time is the time period from the application of power to valid data at the output.
Rev. 1.5
15
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